1975 L. Forbes and J.R. Yeargan, "N-CHANNEL CHARGE COUPLED DEVICE FABRICATION PROCESS," Assigned to TELEX Computer Products, Inc.,
# 3,909,925,(7 pages). view abstract, view full text in .pdf format

1991 H. Haddad, W. Richling and L. Forbes,"CARBON DOPING MOSFET SUBSTRATE TO SUPPRESS HOT ELECTRON TRAPPING,"Assigned to Hewlett-Packard,
#4,992,840,(8 pages). view abstract, view full text of patent

1997 L. Forbes, "MULTIPLICATION OF STORAGE CAPACITANCE IN MEMORY CELLS BY USING THE MILLER EFFECT," assinged to Micron Technology,  filed 4 Sept.1996,
5,666,306 9 Sept. 1997. view abstract , view full text of patent with figures in .pdf format

1997 L. Forbes, "TECHNIQUE FOR PRODUCING  SMALL ISLANDS OF SILICON ON INSULATOR," assigned to Micron Technology, filed 4 Sept 1996,
5,691,280,25 Nov. 1997 . view abstract , view full text patent pdf format

1998  L. Forbes, "MERGED TRANSISTOR GAIN CELL FOR LOW VOLTAGE DRAM(DYNAMIC RANDOM ACCESS) MEMORIES," filed 20 Feb. 97,
 5,732,014  24 March 1998,  view abstract in pdf format ,  view full text with figures

1998 L. Forbes, "MULTI-STATE FLASH MEMORY CELL AND METHOD FOR
PROGRAMMING SINGLE ELECTRON DIFFERENCES,"   filed 29 Jan.1997,
5,740,104  14 April 1998, view abstract in pdf format ,   view full text in pdf format

1998 L. Forbes, "DIFFERENTIAL FLASH MEMORY AND METHOD FOR PROGRAMMING,"
                      filed 29 Jan. 1997;
5,754,477   19 May 1998
 view abstract in .pdf format ,   view full text of patent including figures in .pd f  format

1998 L. Forbes, "FLASH MEMORY WITH MICROCRYSTALLINE SILICON CARBIDE
FILM FLOATING GATE, " filed 29 Jan. 1997,
5,801,401  1 Sept.1998.
 view abstract in html format  , view full text in .pdf format

1998 L. Forbes, "MULTIPLICATION OF STORAGE CAPACITANCE IN MEMORY CELLS BY
USING THE MILLER EFFECT,"  filed 20 June 1997,  continuationof  5,666,306    granted as
   5,835,403    10 Nov. 1998   view abstract in html format ,   view full text in  .pdf  format

1998 L. Forbes, "FLASH MEMORY WITH NANOCRYSTALLINE SILICON FILM AS THE
FLOATING GATE,"  filed 29 Jan. 97
5,852,306 22 Dec 1998 view abstract in pdf format , view full text in pdf format

1999 L. Forbes, ""SILICON-GERMANIUM DEVICES FOR CMOS FORMED BY ION
IMPLANTATION AND SOLID PHASE EPITAXIAL REGROWTH,"  filed 18 Sept.96,
5,879,996  9 March 1999   view abstract in html format ,  view full text with figures in pdf format

1999  L.  Forbes, J. Geusic and K. Ahn, "MICROCRYSTALLINESILICON OXYCARBIDE GATES,"
filed 30 July 1997, view abstract in html format , view full text with figures in pdf format
5,886,368 23 March 1999.

1999  L. Forbes, "MERGED TRANSISTOR GAIN CELL FOR LOW VOLTAGE DRAM MEMORIES
 5,897,351  27 April 1999, continuation of  5,732,014,view abstract,view full text in pdf format

1999  L. Forbes and W.P. Noble, "CIRCUIT AND METHOD FOR AN OPEN BIT LINE MEMORY
         CELL WITH A VERTICALTRANSISTOR AND TRENCH PLATE TRENCH CAPACITOR,"
5,907,170  25 May 1999,  view abstract in html format ,  view full text with figures in pdf format

1999  L.Forbes, W.P. Noble and K. Ahn, "SOI OR BULK DRAM WITH VERTICAL
         TRANSISTORS AND  BURIED WORD AND BODY CONTACT ADDRESS LINES,"
 5,909,618   1 June 1999,  view abstract in html format ,  view full text with figures in pdf format

1999  W. Noble and L. Forbes, "FOLDED BIT LINE 4F2 , ONE CONTACT,TRENCH PLATE
           CAPACITOR,SOI, DRAM CELL,"
5,914,511   22 June 1999,   view abstract in html format ,  view full text in pdf format

1999 L. Forbes, P.A. Farrar and K.Y. Ahn, "METALLIZATION TECHNIQUE FOR GOLD
          WIRING IN INTEGRATED CIRCUITS,"
5,920,121 , 6 July 1999, view abstract in html,  view full text with figures in pdf format

1999  L. Forbes and K.Y. Ahn, “GRADED COMPOSITION SILICON OXYCARBIDE FOR DEEP
           ULTRAVIOLET ANTI-REFLECTION COATING,”
5.926,740  20 July 1999 ,  view abstract in html format , view full text with figures in pdf format

1999   L. Forbes and W. Noble, “HIGH  DENSITY FLASH MEMORY WITH VERTICAL
            TRANSISTORS  AND BURIED CONTROL GATE(ADDRESS) LINES,”
5,936,274   10 Aug. 1999,  view abstract in html format ,

1999  L. Forbes, "MULTI-STATE FLASH MEMORY CELL AND METHOD FOR
           PROGRAMMING SINGLE ELECTRON DIFFERENCES," cont. of  5,740,104
5,959,896  28 Sept. 1999,  view abstract in html format  ,

1999  L. Forbes, "VERTICAL BIPOLAR READ ACCESS FOR LOW VOLTAGE
             MEMORY CELL,"
5,963,469  Oct. 5, 1999,  view abstract in html ,  view full text in pdf format

1999  W. Noble and L. Forbes, "CIRCUIT AND METHOD FOR GATE-BODY STRUCTURES
             IN CMOS TECHNOLOGY,"
5,969,389  19 Oct. 1999 ,   view abstract in html format ,

1999  W. Noble and L. Forbes, "ULTRA HIGH DENSITY FLASH MEMORY,"
5,973,356  Oct. 26, 1999,   view abstract in html format ,

1999  J. Geusic, L. Forbes, and K.Y. Ahn, “DRAM CELLS WITH A STRUCTURED SURFACE
           USING A  SELF STRUCTURED MASK,”  filed 29 May 1998,
5,981,350   9 Nov. 1999 ,  view abstract in html format ,

1999   Forbes , "FLASH MEMORY WITH MICROCRYSTALLINE SILICON CARBIDE
           FILM FLOATING GATE"
5,989,958   23 Nov.  1999 ,   view abstract in htlm format ,  view full text with figures in pdf format

1999   L. Forbes and W.P. Noble, "PROGRAMMABLE MEMORY ADDRESS DECODE
             ARRAY WITH VERTICAL  TRANSISTORS,"
5,991,225     23 Nov. 1999 ,   view abstract in html format  ,  view full text in pdf format

1999  L. Forbes, "MULTIPLICATION OF STORAGE CAPACITANCE IN MEMORY
              CELLS BY USING THE MILLER EFFECT,"
5,995,410    30  Nov. 1999,    view abstract in html format ,

1999   L. Forbes, "DIFFERENTIAL FLASH MEMORY CELL AND METHOD FOR
                PROGRAMMING SAME,"
6,009,018      28 Dec.  1999,  view abstract in html format ,

2000    P. Farrar and L. Forbes, “HIGH Q AIRBRIDGE INDUCTORSFOR SILICON CMOS RF
           INTEGRATED CIRCUITS,”
6,025,261   15 Feb. 2000,  view abstract in html format ,

2000   L. Forbes J. Geusic and K. Ahn, “TRENCH CAPACITOR DRAM CELLS WITH MICRO-
           ROUGHENED SILICON,”
6,025,225  15 Feb. 2000,  view abstract in html format ,

2000  L. Forbes and J. Geusic, “ATOMIC LAYER EXPITAXY GATE INSULATORS AND
         TEXTURED  SURFACES FOR LOW VOLTAGE FLASH MEMORIES,”
6,025,627   15 Feb. 2000,  view abstract in html format ,

2000 L. Forbes and K.Y. Ahn, "DEAPROM AND TRANSISTOR WITH GALLIUM NITRIDE
           OR GALLIUM ALUMINUM NITRIDE GATE,"
6,031,263   29 Feb.  2000,   view abstractin html format ,  view full text in pdf format

2000 L. Forbes and W. Noble, "CIRCUITS AND METHODS FOR A MEMORY CELLWITH A
            TRENCH PLATE TRENCH CAPACITOR AND VERTICAL BIPOLAR READ DEVICE,"
6,043,527   28 March 2000,  view abstract in html format ,

2000 L. Forbes, "LARGE GRAIN SINGLE CRYSTAL VERTICAL THIN FILM POLYSILICON
         MOSFETS,"
6,049,106   11 April 2000,  view abstract in html format ,

2000 L. Forbes and W. Noble, “LOW VOLTAGE DRAM CURRENT SENSE AMPLIFIER WITH
              GATE-BODY CONNECTED AND/OR GATED LATERAL BIPOLAR TRANSISTORS,”
6,049,496  11 April 2000,  view abstract in html format ,

2000  W. Noble and L. Forbes, "CIRCUIT AND METHOD FOR GATE-BODY STRUCTURES IN
                 CMOS TECHNOLOGY,"
6,060,754   9 May 2000,   view abstract in html format ,

2000  W. Noble and L. Forbes, “FOLDED BIT LINE 4F2 DRAM CELL WITH VERTICAL
           TRANSISTORS AND TRENCH CAPACITOR,”
6,066,869  23 May 2000,  viewabstract in html format  ,

2000  W.P. Noble, L. Forbes and K.Y.Ahn, “FOUR F.SUP.2 FOLDED BITLINE DRAM CELL
         STRUCTURE HAVING BURIED BIT AND WORD LINES, Micron 96-1056
6,072,209   6  June  2000,   abstract in html format  ,

2000  L. Forbes, STRUCTURE FOR GATED LATERAL BIPOLAR TRANSISTORS,"
6,075,272   13 Jun.  2000,  view abstract in html format  ,

2000 L. Forbes and W. Noble, “LOW VOLTAGE DRAM CURRENT SENSE AMPLIFIER WITH
              GATE-BODY CONNECTED AND/OR GATED LATERAL BIPOLAR TRANSISTORS,"   6,091,654   18 July 2000 ,  view abstract in html format  ,

2000  J. Geusic, K. Ahn and L. Forbes, “HIGH SPEED OPTICAL WAVEGUIDE INTERCONNECTS  THROUGH SILICON DIE AND WAFERS,”
6,090,636    18 July 2000 ,  view abstract in html format  ,

2000  L. Forbes,  "METHODS OF MAKING SILICON ON INSULATOR STRUCTURES,"
6,093,623    25 July 2000,  view abstract in html format  ,  view full text with figures in pdf format

2000   L.  Forbes and W. Noble, “CIRCUITS AND METHODS FOR DUAL-GATED TRANSISTORS,”
6,097,065      1  Aug.  2000 , view abstract in html format ,  full text pdf format

2000   L. Forbes and K,Y. Ahn, “THRESHOLD VOLTAGE COMPENSATION CIRCUITS FOR LOW
              VOLTAGE AND LOW POWER CMOS INTEGRATED CIRCUITS,”
6,097,242      1  Aug.  2000 , view abstract in html format ,

2000    L. Forbes, P.A. Farrar and K.Y. Ahn, “METALLIZATION TECHNIQUE FOR GOLD WIRING
           IN INTEGRATED CIRCUITS,”
6,100,176       8  Aug. 2000 , view abstract in html format,

2000    L. Forbes, W. Noble and K. Ahn, “MEMORY CELLWITH VERTICAL TRANSISTOR
            AND BURIED WORD AND BODY LINES,”
6,104,061      15 Aug. 2000 ,  view abstract,

2000    L. Forbes and W. Noble, “HIGH DENSITY PLANAR SRAM CELL USING BIPOLAR
            LATCH-UP AND  GATED  DIODE BREAKDOWN,”
6,104,045     15 Aug. 2000  ,  view abstract,

2000 Noble and L. Forbes,  “CIRCUIT AND METHOD FOR LOW VOLTAGE,VOLTAGE
           SENSE AMPLIFIER,”
6,104,066   15 Aug. 2000  ,  view abstract,

2000 L. Forbes, “STRUCTURE AND METHOD FOR IMPROVED SIGNAL PROCESSING,”
6,104,068   15 Aug. 2000  ,  view abstract, full text pdf format

2000    W. Noble and L. Forbes, "CIRCUIT AND METHOD FOR GATE-BODY  STRUCTURES
           IN  CMOS TECHNOLOGY,"
6,,107,663   22 Aug. 2000  , view abstract in html format,

2000    L. Forbes, "CMOS INDUCTORLESS, VCO,  VOLTAGE CONTROLLED OSCILLATOR,"
6,107,893     22 Aug. 2000  ,  view abstract in html format, full text pdf format

2000   L. Forbes  and K.Y. Ahn, "LOW TEMPERATURE ANTI-REFLECTIVE COATING FOR
           IC  LITHOGRAPHY,"
6,117,619   12 Sept. 2000  ,   view abstract

2000  K.Y. Ahn, L. Forbes and P.A. Farrar, "METHODS AND STRUCTURES FOR METAL
             INTERCONNECTS IN INTEGRATED CIRCUITS
6,121,126    Sept. 19, 2000  ,  view abstract

2000   K. Y.Ahn and L. Forbes, "STACKED INTEGRATED CIRCUITS,"
6,122,187    Sept. 19, 2000  ,  view abstract

2000 W. P. Noble and L. Forbes, "FIELD PROGRAMMABLE LOGIC ARRAYS WITH
                VERTICAL  TRANSISTORS,"
6,124,729   Sept. 26th , 2000   ,   view abstract in html format  , view full text in pdf format

20000 K.Y. Ahn and L. Forbes, "SINGLE ELECTRON MOSFET MEMORY DEVICE,"
6,125,062   Sept. 26th, 2000 ,   view abstract in html format  , view full text in pdf format

2000 W.P. Noble and L. Forbes, "HIGH DENSITY PLANAR SRAM CELL WITH
                       MERGED TRANSISTORS,"
6,128,216   Oct. 3, 2000  ,    view abstract in html format   , view full text in pdf format

2000 L. Forbes and W.P. Noble, "MEMORY ADDRESS DECODE ARRAY WITH VERTICAL
                  TRANSISTORS,"
6,134,175    Oct. 17, 2000 , view abstract in html format  , view full text in pdf format

6,137,167   October 24, 2000   view abstract in html format
K.Y. Ahn and L. Forbes, "Multichip module with built in repeaters and method"

 2000 L. Forbes and J. Geusic, "MEMORY USING INSULATOR TRAPS"
6,140,181  Oct. 31, 2000 ,  view abstract  , view full text in pdf format

2000 L.  Forbes, " LOW POWER SUPPLY CMOS DIFFERENTIAL AMPLIFIER TOPOLOGY "
6,140,877   Oct. 31, 2000 ,   view abstract  , view full text in pdf format

2000 L. Forbes,  K.Y. Ahn, W.P. Noble and A. R. Reinberg, "DYNAMIC RANDOM ACCESS
          MEMORY (DRAM)  CELLS   WITH REPRESSED FERROELECTRIC MEMORY
            METHODS OF READING SAME, AND APPARATUSES INCLUDING SAME ,"
6,141,238   Oct. 31, 2000 ,  view abstract  , view full text in pdf format

2000 L. Forbes, and A.R. Reinberg, " DRAM AND SRAM MEMORY CELLS WITH
          REPRESSED MEMORY ,"
6,141,248   Oct. 31, 2000  ,   view abstract  , view full text in pdf format

2000 L. Forbes, “DIFFERENTIAL FLASH MEMORY CELL AND METHOD FOR
            PROGRAMMING SAME,"
6,141,256    Oct. 31, 2000 ,  view abstract  , view full text in pdf format

2000 K.Y.  Ahn, and L. Forbes, "SINGLE ELECTRON RESISTOR MEMORY DEVICE
           AND METHOD FOR USE THEREOF ,"
6,141,260   Oct. 31, 2000 ,  view abstract  , view full text in pdf format

2000 J.E. Geusic, K.Y. Ahn and L. Forbes, "METHODS OF FORMING COAXIAL
               INTEGRATED CIRCUITRY INTERCONNECT LINES,"
6,143,616  Nov. 7, 2000 ,   view abstract in html , view full text in pdf format

2000  L. Forbes and W.P. Noble, "HIGH DENSITY FLASH MEMORY,"
6,143,636  Nov. 7, 2000 ,   view abstract in html format, view full text in pdf format

2000  L. Forbes, P.A. Farrar, and K.Y. Ahn, "METHODS AND STRUCTURES FOR
                   SILVER  INTERCONNECTS IN INTEGRATED CIRCUITS,"
6,143,655  Nov. 7, 2000 ,  view abstract in html, view full text in pdf format

2000 W.P. Noble, K.Y. Ahn and L. Forbes, “MEMORY CELL HAVING A VERTICAL
             TRANSISTOR WITH BURIED SOURCE/DRAIN AND DUAL GATES,”
6,150,687   21  Nov. 2000 ,  view abstract in html format, view full text in pdf format

2000 J.E.  Geusic, K.Y. Ahn, and L. Forbes, “ INTEGRATED CIRCUITS USING OPTICAL
             FIBER  INTERCONNECTS FORMED THROUGH A SEMICONDUCTOR WAFER
               AND METHODS FOR FORMING SAME,”
6,150,188   21 Nov. 2000  , view abstract in html format, view full text in pdf format

2000   L. Forbes and W.P. Noble,"METHOD OF FORMING A LOGIC ARRAY FOR A
                  DECODER,"
6,153,468  28 Nov. 2000 ,  view abstract in html format, view full text in pdf format

2000 W.P. Noble and L. Forbes, “METHOD FOR A FOLDED BIT LINE MEMORY
         USING TRENCH PLATE CAPACITOR CELLS WITH   BODY BIAS CONTACTS,”
6,156,607 5 Dec. 2000 ,  view abstract in html format ,

2000 L. forbes and W.P. Noble, “METHOD FOR MAKING AN OPEN BIT LINE
          MEMORY CELL WITH A VERTICAL TRANSISTOR AND  TRENCH PLATE
          TRENCH CAPACITOR,”
6,156,604  5 Dec. 2000  , view abstract in html format,
.
2000 L. Forbes and K. Y. Ahn, “ METHOD OF FORMING INSULATING MATERIAL
         BETWEEN COMPONENTS OF AN INTEGRATED  CIRCUIT,”
6,156,374   5 Dec. 2000 , view abstract in html format ,

2000 L. Forbes and K. Y. Ahn, “ POROUS SILICON DIOXIDE INSULATOR,”
6,163,066   19  Dec. 2000 , view abstract in html format,

2000 L. Forbes and W. P. Noble, CIRCUIT AND METHOD FOR AN OPEN BIT LINE MEMORY
                  CELL  WITH A VERTICAL TRANSISTOR AND TRENCH PLATE CAPACITOR,"
6,165,836  Dec. 26, 2000   view abstract in html,

2000 L. Forbes and W.P. Noble, "STRUCTURE AND METHOD FOR GATED LATERAL BIPOLAR
                 TRANSISTORS,"
6,165,828  Dec. 26, 2000  view abstract in html,

2000 L. Forbes, "FLASH MEMORY WITH MICROCRYSTALLINE SILICON CARBIDE
                     FLOATING  GATE,"
6,166,401   Dec. 26, 2000  view abstract in html,view full text in pdf format

2001  L Forbes, “TECHNIQUE FOR PRODUCING SMALL ISLANDS OF SILICON ON
                  INSULATOR,”
6,174,784    January 16, 2001  view abstract in html format , view full text in pdf format

2001  L. Forbes, W.P. Noble and K.Y. Ahn, “ MEMORY CELL WITH VERTICAL
      TRANSISTOR AND  BURIED WORD AND BODY LINES,”
6,191,448     February 20, 2001 view abstract in html format ,

2001   L. Forbes and K.Y. Ahn, “INDUCTOR WITH MAGNETIC MATERIAL
            LAYERS,”
6,191,468     February 20, 2001 view abstract in html format,

2001   L. Forbes and K.Y. Ahn, “SEMICONDUCTOR-ON-INSULATOR MEMORY CELL
                 WITH BURIED  WORD AND BODY LINES,”
6,191,470      February 20, 2001 view abstract in html format,

 2001 J.E. Geusic, K.Y. Ahn and L. Forbes , "INTEGRATED CIRCUITS USING HIGH ASPECT RATIO
             VIAS THROUGH A SEMICONDUCTOR WAFER AND METHOD FOR FORMING SAME,"
 6,198,168   March 6, 2001    view abstract in html format,

 2001 L. Forbes,  “SENSE AMPLIFIER FOR LOW VOLTAGE MEMORY ARRAYS,”
 6,198,681  March 6, 2001     view abstract in html format,

2001 L. Forbes, “MONOLITHIC INDUCTANCE-ENHANCING INTEGRATED CIRCUITS,
         COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) INDUCTANCE-
          ENHANCING INTEGRATED CIRCUITS, INDUCTOR ASSEMBLIES, AND INDUCTANCE-
            MULTIPLYING METHODS,”
6,201,287  March 13, 2001   view abstract in html format,

2001 W.P. Noble and L.Forbes, “ PROGRAMMABLE LOGIC ARRAY WITH VERTICAL
           TRANSISTORS,”
6,208,164  27 March 2001  view abstract in html format  view full text in pdf format

2001  L. Forbes and K.Y. Ahn,  “HOMOJUNCTION SEMICONDUCTOR DEVICES WITH LOW
        BARRIER TUNNEL OXIDE CONTACTS
6,211,562  3 April  2001    view abstract in html format   view full text in pdf format

2001  K.Y. Ahn and L. Forbes, “METHODS FOR MAKING COPPER AND OTHER METAL
        INTERCONNECTIONS IN INTEGRATED CIRCUITS,”
6,211,073  3 April 2001    view abstract in html format    view full text in pdf format

2001  J.E. Geusic, L. Forbes and K.Y. Ahn,   “STRUCTURE AND METHOD FOR AN  ELECTRONIC
              ASSEMBLY,”
6,219,237 April 17, 2001   view abstract in html format   view full text in pdf format

2001 L.Forbes and K.Y. Ahn, “PROGRAMMABLE MEMORY DECODE CIRCUITS WITH
               TRANSISTORS WITH VERTICAL GATES,”
6,219,299 April 17, 2001 view abstract in html format  view full text in pdf format

2001 K.Y. Ahn and L. Forbes, "VERTICAL GATE TRANSISTORS IN PASS TRANSISTOR LOGIC DECODE CIRCUITS,"
6,222,788  April 24, 2001  view abstract in html format

2001 K.Y. Ahn and L. Forbes, "SINGLE ELECTRON MOSFET MEMORY DEVICE AND METHOD,"
6,222,778  April 24, 2001  view abstract in html format  view full text in pdf format

2001  W.P. Noble and L. Forbes, “HIGH DENSITY SRAM CELL WITH LATCHED
                  VERTICAL  TRANSISTORS,”
6,225,165   May 1, 2001  view abstract in html format

2001  W.P. Noble and L. Forbes,” CIRCUITS AND METHOD FOR BODY CONTACTED
                    AND BACKGATED TRANSISTORS
6,229,342    May 8, 2001  view abstract in html format

2001  L. Forbes and J.E. Guesic, “MEMORY USING INSULATOR TRAPS”
6,232,643    May 15, 2001  view abstract in html format

2001  L. Forbes and K.Y. Ahn, “FIELD EMITTER ARRAYS WITH GATE INSULATOR
                AND CATHODE FORMED FROM SINGLE LAYER OF POLYSILICON,”
6,232,705   May 15, 2001   view abstract in html format

2001 W.P. Noble and L. Forbes, " Circuit and method for low voltage, voltage sense amplifier,"
6,235,569  May 22, 2001  view abstract in html format

2001  W.P. Noble and L. Forbes, "Method for forming high density flash memory,"
6,238,976  May 29, 200   view abstract in html format   view full text in pdf format

2001  P.A. Farrar  and L. Forbes, " High-Q inductive elements,"
6,239,684  May 29, 2001   view abstract in html format  view full text in pdf format

2001 K.Y, Ahn and L.Forbes ," Integrated circuit inductors,"
6,240,622   June 5, 2001 view abstract in html format  view full text in pdf format

2001  J.E. Geusic and L. Forbes ,   "Method and structure for textured surfaces in
                            floating gate tunneling oxide devices,"
6,242,304    June 5, 2001  view abstract in html format view full text in pdf format

2001  L. Forbes and J.E. Geusic,  " Memory using insulator traps,"
 6,246,606    June 12, 2001  view abstract in html format  view full text in pdf format

2001 W.P. Noble, L. Forbes and A.R. Reinberg, " Method and apparatus on (110)
          surfaces of silicon structures with conduction in the <110> direction,"
 6,245,615    June 12, 2001   view abstract in html format  view full text in pdf format

2001  L. Forbes and K.Y. Ahn, "DEAPROM and transistor with gallium nitride or gallium aluminum
                            nitride gate,"
6,249,020  June 19, 2001    view abstract in html format  view full text in pdf format

2001  L. Forbes, "Monolithic integrated circuit oscillators, complementary metal oxide semiconductor
               (CMOS) voltage-controlled oscillators, integrated circuit oscillators, oscillator-forming
                methods, and oscillation methods,"
6,249,191  June 19, 2001    view abstract in html format  view full text in pdf format

2001  L. Forbes, L.C.  Tran, A.R. Reinberg, J.E. Geusic, K.Y. Ahn, P.A.Farrar, E.H. Cloud,
            and  D.J. McElroy, "Dynamic flash memory cells with ultrathin tunnel oxides,"
6,249,460  June 19, 2001   view abstract in html format  view full text in pdf format

2001   L. Forbes and K.Y. Ahn, "Methods of forming insulating materials, and methods of
            forming insulating materials around a conductive component,"
6,251,470      June 26, 2001  view abstract in html format  view full text in pdf format

2001   L. Forbes and K.Y. Ahn, "Method for forming porous silicon dioxide insulators and
              related structures,"
6,255,156       July 3, 2001  view abstract in html format view full text in pdf format

2001   L. Forbes and K.Y. Ahn, " Current mode signal interconnects and CMOS amplifier,"
6,255,852       July 3, 2001  view abstract in html format  view full text in pdf format

2001  L. Forbes and K.Y. Ahn, "Low temperature anti-reflective coating for IC lithography,"
6,261,751   July 17, 2001   view abstract in html format  view full text in pdf format

2001  K.Y. ahn and L. Forbes, "Silicon multi-chip module packaging with integrated passive
           components and method of making,"
6,274,937     14 Aug. 2001   view abstract in html format  view full text in pdf format

2001 L. Forbes, "Four transistor SRAM cell with improved read access,"
6,275,433     14 Aug. 2001   view abstract in html format view full text in pdf format

2001  K.Y. Ahn and L. Forbes, "Multilevel interconnect structure with low-k dielectric
                and method of fabricating the structure,"
6,277,728    August 21, 2001   view abstract in html format  view full text in pdf format

2001  K.Y. Ahn, L. Forbes and E.H. Cloud, "Structure and method for a
                  high performance electronic packaging assembly,"
6,281,042   August 28, 2001  view abstract in html format  view full text in pdf format

2001  L. Forbes and K.Y. Ahn, "Inductor with magnetic material layers,"
6,287,932    September 11, 2001  view abstract in html format, view full text in pdf format

2001  L. Forbes and J.M. Eldridge, "Antifuse structures methods and applications,"
6,288,437    September 11, 2001  view abstract in html format

2001  L. Forbes,  "Pseudo-differential current sense amplifier with hysteresis,"
6,288,575    September 11, 2001 view abstract in html format

2001  L. Forbes and J.E. Geusic, "Information handling system having improved floating gate
                  tunneling devices,"
6,294,813   September 25, 2001 view abstract in html format

2001  K.Y. Ahn and L. Forbes, "Structure and method for dual gate oxide thicknesses,"
6,297,103   October 2, 2001  view abstract in html format

2001 L. Forbes and K.Y. Ahn, "Graded anti-reflective coating for IC lithography,"
6,297,521 October 2, 2001  view abstract in html format

2001 K.Y. Ahn and L. Forbes, "Single electron MOSFET memory device and method,"
6,297,994  October 2, 2001 view abstract in html format

2001  L. Forbes, "Flash memory with nanocrystalline silicon film as the floating gate,"
6,300,193  October 9, 2001 view abstract in html format

2001 K.Y. Ahn and L. Forbes, "Single electron MOSFET memory device and method,"
6,301,162  October 9, 2001 view abstract in html format

2001 K.Y. Ahn and L. Forbes, "Single electron MOSFET memory device and method,"
6,304,493  October 16, 2001 view abstract in html format

2001 L. Forbes and B. Keeth, "Differential correlated double sampling DRAM sense amplifier,"
6,304,505  October 16, 2001 view abstract in html format

2001 K.Y.Ahn and L. Forbes, "Multichip module with built in repeaters and method"
6,306,681  October 23, 2001  view abstract in html format

2001 L. Forbes and W.P. Noble, "Another technique for gated lateral bipolar transistors"
6,307,235  October 23, 2001 view abstract in html format

2001 L. Forbes and E.H. Cloud, "Current sense amplifier and current comparator with hysteresis"
6,307,405 October 23, 2001 view abstract in html format

2001  L. Forbes and K.Y. Ahn, "DEAPROM and transistor with gallium nitride
                                                                               or gallium aluminum nitride gate"
6,307,775  October 23, 2001 view abstract in html format

2001   L. Forbes, J.E. Geusic and K. Y. Ahn, "Method of fabricating transistor
                           with silicon oxycarbide gate,"
6,309,907   October 30, 2001 view abstract in html format

2001   L. Forbes, "Methods for making silicon-on-insulator structures"
6,309,950  October 30, 2001 view abstract in html format

2001  L. Forbes and K.Y. Ahn, "Porous silicon oxycarbide integrated circuit insulator"
6,313,518   November 6, 2001  view abstract in html format

2001  J.E. Geusic, K.Y. Ahn and L. Forbes, " Coaxial integrated circuitry interconnect lines
                                    and integrated circuitry ,"
6,313,531     November 6, 2001 view abstract in html format

2001  K.Y. Ahn and L. Forbes, "Stacked integrated circuits"
6,314,013     November 6, 2001 view abstract in html format

L. Forbes and K.Y. Ahn, "Differential receivers in a CMOS process,"
6,316,969  November 13, 2001   view abstract in html format

L. Forbes, "Vertical bipolar read access for low voltage memory cell,"
6,317,357  November 13, 2001 view abstract in html format

L. Forbes and W.P. Noble, "Structure and method for reducing threshold voltage
                variations due to dopant fluctuations
6,320,222  November 20, 2001 view abstract in html format

L. Forbes, "Voltage tunable active inductorless filter,"
6,327,465   December 4, 2001   view abstract in html format

 L Forbes  and J.E. Geusic,  " Alternate method and structure for improved floating gate
           tunneling devices using textured surface,"
6,331,465  December 18, 2001 view abstract in html format

L. Forbes,    "Memory circuit and method of using same"
6,337,808   January 8, 2002    view abstract in html format

L. Forbes, W.P. Noble and K.Y. Ahn,   "Discrete devices including EAPROM transistor
         and NVRAM  memory cell with edge defined ferroelectric capacitance, methods for
          operating same, and apparatuses including same,"
6,337,805   January 8, 2002    view abstract in html format

W.P. Noble and L. Forbes, "Method of fabricating body contacted and backgated transistors,"
6,340,612  January 22, 2002   view abstract in html format

 L. Forbes, "Low power supply CMOS differential amplifier topology,"
6,346,858   February 12, 2002   view abstract in html format

L. Forbes, "Programmable low voltage decode circuits with ultra-thin tunnel oxides ,"
6,351,428   February 26, 2002   view abstract in html format

L. Forbes and J.E. Geusic, "Memory using insulator traps,"
6,351,411  February 26, 2002   view abstract in html format

K.Y. Ahn and L. Forbes, "Porous silicon oxycarbide integrated circuit insulator,"
6,350,704  February 26, 2002   view abstract in html format

W.P. Noble, L. Forbes and K.Y. Ahn, "   Memory cell having a vertical transistor with buried
           source/drain and dual gates,"
6,350,635  February 26, 2002   view abstract in html format

L. Forbes and K.Y. Ahn, "Methods of forming insulating materials between conductive components
                and methods of forming insulating materials around a conductive component,"
6,352,933   March 5, 2002   view abstract in html format

L. Forbes and K.Y. Ahn, "Methods of transforming a material to form an insulating material
        between components of an integrated circuit,"
6,355,299  12 March 2002   view abstract in html format

L. Forbes, "Structure and method for improved signal processing,"
6,355,961   12 March 2002   view abstract in html format

E.H. Cloud, K.Y. Ahn, L. Forbes, P.A. Farrar, K.G. Donohoe, A.R. Reinberg, D.J. McElroy,
       L.C. Tran, and J. E. Geusic, "Reduced power DRAM device and method,"
6,356,500  12 March 2002    view abstract in html format

K.Y. Ahn and L. Forbes, " Integrated circuit inductors ,"
 6,357,107    March 19, 2002    view abstract in html format

L. Forbes, "Voltage tunable active inductorless filter,"
6,362,691     March 26, 2002   view abstract in html format

L. Forbes, "Monolithic frequency selective component and method of operating same,"
6,362,692   March 26, 2002    view abstract in html format

L. Forbes and W.P. Noble, "Structure and method for gated lateral bipolar transistors,"
6,365,448   April 2, 2002       view abstract in html format

L. Forbes and K.Y. Ahn, "Low temperature anti-reflective coating for IC lithography,"
6,365,333      April 2, 2002   view abstract in html format

L. Forbes, K.Y. Ahn and L.C. Tran, "Methods of forming semiconductor structures,"
6,372,618  April 16, 2002    view abstract in html format

L. Forbes, "Clock-delayed pseudo-NMOS domino logic,"
6,373,290  April 16, 2002    view abstract in html format

L. Forbes, E.H. Cloud and K.Y. Ahn, "Transmission lines for CMOS integrated circuits,"
6,373,740  April 16, 2002    view abstract in html format

L. Forbes and W.P. Noble, "Methods for dual-gated transistors,"
6,376,317    April 23, 2002 view abstract in html format

P.A. Farrar and L. Forbes, "High-Q inductive elements,"
6,376,895   April 23, 2002 view abstract in html format

L. Forbes and K.Y. Ahn, "Mixed-mode stacked integrated circuit with power supply
                circuit part of the stack ,"
6,376,909   April 23, 2002 view abstract in html format

L. Forbes, "In-service programmable logic arrays with ultra thin vertical body transistors,"
6,377,070   April 23, 2002 view abstract in html format

L. Forbes, "Pseudo-differential amplifiers,"
6,377,084   April 23, 2002 view abstract in html format

P.A. Farrar and L. Forbes, "High-Q inductive elements,"
6,377,156  April 23, 2002 view abstract in html format

K.Y. Ahn and L. Forbes, "Wafer on wafer packaging and method of fabrication for full-wafer
                    burn-in and testing,"
6,379,982   April 30, 2002   view abstract in html format

L. Forbes and K.Y. Ahn, "Double pass transistor logic with vertical gate transistors,"
6,380,765  April 30, 2002 view abstract in html format

L. Forbes,  "Integrated circuit and method for minimizing clock skews,"
6,380,787   April 30, 2002  view abstract in html format

L. Forbes, "Circuits and methods for a memory cell with a trench plate trench capacitor
             and a vertical bipolar read device,"
6,381,168    April 30, 2002 view abstract in html format

W.P. Noble and L. Forbes, "Method of forming multiple oxide thicknesses for merged
           memory and logic applications,"
6,383,871   May 7, 2002 view abstract in html format

L. Forbes, "P-channel dynamic flash memory cells with ultrathin tunnel oxides,"
6,384,448   May 7, 2002 view abstract in html format

K.Y. Ahn and L. Forbes, "Silicon interposer with optical connections,"
6,392,296  May 21, 2002   view abstract in html format

K.Y. Ahn and L. Forbes, "Stacked integrated circuits,"
6,395,630   May 28, 2002   view abstract in html format

W.P. Noble, L. Forbes and K.Y. Ahn, "Memory cell having a vertical transistor with buried source/drain
                  and dual gates,"
6,399,979   June 4, 2002   view abstract in html format

L. Forbes, "Flash memory with nanocrystalline silicon film floating gate,"
6,407,424   June 18, 2002   view abstract in html format

K.Y. Ahn and L. Forbes, "Single electron resistor memory device and method,"
6,407,426   June 18, 2002   view abstract in html format

L. Forbes, "Method for signal processing'"
6,413,825  July 2, 2002   view abstract in html format

L. Forbes and W.P. Noble,  "Circuits and methods for dual-gated transistors,"
6,414,356  July 2, 2002   view abstract in html format

L. Forbes, "CMOS linear amplifier formed with nonlinear transistors,"
6,414,550  July 2, 2002   view abstract in html format

L. Forbes, "Circuits and methods for a memory cell with a trench plate trench capacitor
  and a vertical bipolar read device,"
6,418,050 July 9, 2002     view abstract in html format

K.Y. Ahn and L. Forbes, "Ferroelectric memory transistor with high-k gate insulator and
                     method of fabrication,"
6,420,742   July 16, 2002   view abstract in html format

L. Forbes and K.Y. Ahn, "Field programmable logic arrays with transistors with vertical gates,"
6,420,902    July 16, 2002    view abstract in html format

K.Y. Ahn and L. Forbes, " Coupled multilayer soft magnetic films for high frequency
              microtransformer for system-on-chip power supply,"
6,420,954   July 16, 2002    view abstract in html format

6,423,629  July 23, 2002    view abstract in html format
K.Y. Ahn and L. Forbes, "Multilevel copper interconnects with low-k dielectrics and air gaps,"

L. Forbes and K.Y. Ahn, "Flash memory with ultra thin vertical body transistors,"
6,424,001   23 July 2002   view abstract in html format

K.Y. Ahn, L. Forbes and P.A. Farrar, "High performance packaging for microprocessors
           and DRAM chips which minimizes timing skews
6,424,034   23 July 2002   view abstract in html format

L. Forbes, "Circuits and methods for a memory cell with a trench plate trench capacitor
and a vertical bipolar read device"
6,429,065    August 6, 2002  view abstract in html format

K.Y. Ahn and L. Forbes, "Methods and apparatus for making integrated-circuit wiring
      from copper, silver, gold, and other metal,"
6,429,120     August 6, 2002  view abstract in html format

L. Forbes, "Efficient CMOS DC-DC converters based on switched capacitor power
         supplies with inductive current limiters,"
6,429,632     August 6, 2002  view abstract in html format

K.Y. Ahn and L. Forbes, "Buried ground plane for high performance system modules,"
6,432,724    August 13, 2002   view abstract in html format

L. Forbes, "Circuits and methods for a memory cell with a trench plate trench capacitor
and a vertical bipolar read device,"
6,434,041  August 13, 2002    view abstract in html format

6,436,748  Forbes ,   et al.   August 20, 2002 view abstract in html format
Method for fabricating CMOS transistors having matching characteristics and apparatus formed
thereby

6,437,389  Forbes ,   et al.   August 20, 2002 view abstract in html format
Vertical gate transistors in pass transistor programmable logic arrays

6,437,604 Forbes   August 20, 2002 view abstract in html format
Clocked differential cascode voltage switch with pass gate logic

6,441,479  Ahn ,   et al.  August 27, 2002 view abstract in html format
System-on-a-chip with multi-layered metallized through-hole interconnection

6,446,327   September 10, 2002    view abstract in html format
Ahn ,   et al. , "Integrated circuit inductors,"

6,448,601  Forbes ,   et al.  September 10, 2002 view abstract in html format
Memory address and decode circuits with ultra thin body transistors

6,448,615  Forbes ,   et al.  September 10, 2002 view abstract in html format
Methods, structures, and circuits for transistors with gate-to-body capacitive coupling

6,452,831  Ahn , et al. September 17, 2002 view abstract in html format
Single electron resistor memory device and method

6,452,839  Ahn , et al.  September 17, 2002 view abstract in html format
Method for erasing data from a single electron resistor memory

6,452,856  Forbes , et al. September 17, 2002 view abstract in html format
DRAM technology compatible processor/memory chips

6,454,912  K.Y. Ahn and L. Forbes  September 24, 2002 view abstract in html format
"Method and apparatus for the fabrication of ferroelectric films"

6,456,157  L. Forbes and K.Y. Ahn  September 24, 2002 view abstract in html format
"Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits"

6,456,535  Forbes; Leonard (Corvallis, OR); Tran; Luan C. (Meridian, ID); Reinberg; Alan R. (Westport, CT);
          Geusic; Joseph E. (Berkeley Heights, NJ); Ahn; Kie Y. (Chappaqua, NY); Farrar; Paul A. (So.
          Burlington, VT); Cloud; Eugene H. (Boise, ID); and McElroy;  David J. (Livingston, TX)
                                                          September 24, 2002  view abstract in html format
"Dynamic flash memory cells with ultra thin tunnel oxides"

6,462,582  L.  Forbes    October 8, 2002 view abstract in html format
"Clocked pass transistor and complementary pass transistor logic circuits "

6,465,298   L. Forbes and K.Y. Ahn   October 15, 2002    view abstract in html format
"Method of fabricating a semiconductor-on-insulator memory cell with buried word and body lines"

6,465,375  K.Y. Ahn and L. Forbes   October 15, 2002 view abstract in html format
"Single electron MOSFET memory device and method"

6,465,805(WITHDRAWN)

6,469,582   L. Forbes,                       October 22, 2002      view abstract in html format
"Voltage tunable active inductorless filter"

6,472,720 (WITHDRAWN)

6,472,939  L. Forbes,                         October 29, 2002    view abstract in html format
"Low power supply CMOS differential amplifier topology"

6,476,434       November 5, 2002 view abstract in html format
W.P. Noble, K.Y. Ahn and L. Forbes, "4 F2 folded bit line dram cell structure having buried bit
                           and word lines"

6,476,441    November 5, 2002    view abstract in html format
J.E. Geusic and L. Forbes, "Method and structure for textured surfaces in floating gate tunneling
                    oxide devices"

6,483,171 Forbes; Leonard (Corvallis, OR); Noble; Wendell P. (Milton, VT);
       Reinberg; Alan R. (Westport, CT)         November 19, 2002  view abstract in html format
"Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher
order surfaces of bulk, SOI and thin film structures and method of forming same"

6,486,027    November 26, 2002    view abstract in html format
 W.P. Noble and L. Forbes, "Field programmable logic arrays with vertical transistors,"

6,486,703   November 26, 2002     view abstract in html format
  W.P. Noble and L. Forbes, "Programmable logic array with vertical transistors,"

6,492,233    December 10, 2002    view abstract in html format
L. Forbes , W.P. Noble and K.Y. Ahn, "Memory cell with vertical transistor and buried word and body lines"

6,492,694     December 10, 2002   view abstract in html format
W.P.Noble and L. Forbes, "Highly conductive composite polysilicon gate for CMOS integrated circuits"

6,495,436    December 17, 2002    view abstract in html format
K.Y. Ahn and L. Forbes,   "Formation of metal oxide gate dielectric"

6,495,955   December 17, 2002                      view abstract in html format
L. Forbes and K.Y. Ahn, "Structure and method for improved field emitter arrays"

6,496,034   December 17, 2002     view abstract in html format
L. Forbes and K.Y. Ahn, "Programmable logic arrays with ultra thin body transistors"

6,496,370 . Geusic; Joseph E. (Berkeley Heights, NJ); Forbes; Leonard (Corvallis, OR); Ahn; Kie Y.
          (Chappaqua, NY)   December 17, 2002   view abstract in html format
"Structure and method for an electronic assembly"

6,498,065          December 24, 2002                 view abstract in html format
L. Forbes and W.P. Noble, "Memory address decode array with vertical transistors"

6,498,362          December 24, 2002           view abstract in html format
L. Forbes and K.Y. Ahn, "Weak ferroelectric transistor"

6,503,790      .  January 7, 2003 view abstract in html format
W.P. Noble and L. Forbes, "High density vertical SRAM cell using bipolar latchup induced
             by gated diode breakdown"

6,504,201        January 7, 2003 view abstract in html format
W.P. Noble, L. Forbes and K.Y. Ahn, "Memory cell having a vertical transistor with buried
           source/drain and dual gates"

6,504,224          January 7, 2003                 view abstract in html format
K.Y. Ahn, L. Forbes and P.A. Farrar, "Methods and structures for metal interconnections
           in integrated circuits,"

6,512,400    January 28, 2003                       view abstract in html format
IL. Forbes, "Integrated circuit comparator or amplifier"

6,512,695     January 28, 2003   view abstract in html format
L. Forbes and K.Y. Ahn, "Field programmable logic arrays with transistors with vertical gates"

6,514,820    February 4, 2003                          view abstract in html format
K.Y. Ahn and L. Forbes, ""Method for forming single electron resistor memory"

6,514,828     February 4, 2003                          view abstract in html format
K.Y. Ahn and L. Forbes, "Method of fabricating a highly reliable gate oxide"

6,515,510    February 4, 2003                             view abstract in html format
W.P. Noble and L. Forbes, "Programmable logic array with vertical transistors "

6,518,615    February 11, 2003                          view abstract in html format
J.E. Geusic, L. Forbes and K.Y. Ahn, "Method and structure for high
capacitance memory cells"

6,519,197   February 11, 2003                           view abstract in html format
L. Forbes, "Sense amplifier with improved read access"

6,521,958   February 18, 2003                             view abstract in html format
L. Forbes, W.P. Noble and E.H. Cloud, "MOSFET technology for programmable address decode and correction"

6,526,191  February 25, 2003                              view abstract in html format
J.E. Geusic, K.Y. Ahn and L. Forbes, "Integrated circuits using optical fiber interconnects formed through a semiconductor wafer and methods for forming same"

 6,528,837   March 4, 2003                                     view abstract in html format
L. Forbes and W.P. Noble, "Circuit and method for an open bit line memory cell with a vertical
transistor and trench plate trench capacitor"

6,531,727    March 11, 2003                                 view abstract in html format
L. Forbes and K.Y. Ahn, "Open bit line DRAM with ultra thin body transistors"

6,531,929    March 11, 2003     view abstract in html format
L. Forbes, "Monolithic integrated circuit oscillators, complementary metal  oxide semiconductor (CMOS) voltage-controlled oscillators, integrated circuit oscillators, oscillator-forming methods, and
oscillation methods"

6,531,945    March 11, 2003                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductor with a magnetic core"

6,534,420          March 18, 2003                           view abstract in html format
K.Y. Ahn and L. Forbes, "Methods for forming dielectric materials and methods for forming
           semiconductor devices"

6,534,855         March 18, 2003                             view abstract in html format
K.Y. Ahn and L. Forbes, "Wireless communications system and method of making"

6,535,071         March 18, 2003                           view abstract in html format
L. Forbes, "CMOS voltage controlled phase shift oscillator"

6,535,101         March 18, 2003                             view abstract in html format
K.Y. Ahn and L. Forbes, "Low loss high Q inductor"

6,537,871       March 25, 2003                                view abstract in html format
L. Forbes and W.P. Noble, "Circuit and method for an open bit line memory cell with a vertical
transistor and trench plate trench capacitor"

6,538,330        March 25, 2003                               view abstract in html format
L. Forbes, "Multilevel semiconductor-on-insulator structures and circuits"

6,538,476       March 25, 2003                              view abstract in html format
L. Forbes, "Method of forming a pseudo-differential current sense amplifier with hysteresis"

6,539,490        March 25, 2003                             view abstract in html format
L. Forbes and K.Y. Ahn, "Clock distribution without clock delay or skew"

6,541,362      April 1, 2003                                  view abstract in html format
Forbes ,   et al. , "Methods of forming semiconductor structures"

6,541,859   April 1, 2003                                        view abstract in html format
Forbes ,   et al. , "Methods and structures for silver interconnections in integrated circuits,"

6,544,846     April 8, 2003                                      view abstract in html format
K.Y. Ahn and L. Forbes, "Method of manufacturing a single electron resistor memory device"

6,545,297    April 8, 2003                                      view abstract in html format
W.P. Noble and L. Forbes, "High density vertical SRAM cell using bipolar latchup induced by
                  gated diode breakdown,"

6,545,314    April 8, 2003                                       view abstract in html format
L. Forbes and J.E. Geusic, "Memory using insulator traps"

6,548,107  April 15, 2003                                          view abstract in html format
L. Forbes and K.Y. Ahn, "Methods of forming an insulating material proximate a substrate,
       and methods of forming an insulating material between components of an integrated circuit"

6,552,383   April 22, 2003                                          view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated decoupling capacitors"

6,552,564  April 22, 2003                                           view abstract in html format
L. Forbes and K.Y. Ahn, "Technique to reduce reflections and ringing on CMOS interconnections"

6,556,068  April 29, 2003                                      view abstract in html format
L. Forbes and K.Y. Ahn, "Threshold voltage compensation circuits for low voltage and
        low power CMOS integrated circuits"

6,559,491  May 6, 2003                                            view abstract in html format
L. Forbes and K.Y. Ahn, "Folded bit line DRAM with ultra thin body transistors"

6,563,345 May 13, 2003                                            view abstract in html format
L. Forbes, "Monotonic dynamic static pseudo-NMOS logic circuits"

6,566,682  May 20, 2003                                            view abstract in html format
L. Forbes, "Programmable memory address and decode circuits with ultra thin
                                                              vertical body transistors,"

6,566,731   May 20, 2003                                         view abstract in html format
K.Y. Ahn and L. Forbes, "Open pattern inductor,"

6,569,715   May 27, 2003      view abstract in html format
L. Forbes, "Large grain single crystal vertical thin film polysilicon mosfets

6,570,248  May 27, 2003       view abstract in html format
K.Y. Ahn, L. Forbes and E.H. CLoud, "Structure and method for a high-performance
                  electronic packaging assembly"

6,573,169   June 3, 2003      view abstract in html format
W.P. Noble and L. Forbes, "Highly conductive composite polysilicon gate for CMOS
               integrated circuits,"

6,574,144  June 3, 2003       view abstract in html format
L. Forbes, "Flash memory with nanocrystalline silicon film coating gate"

6,580,154 June 17, 2003        view abstract in html format
W.P. Noble, L. Forbes and A.R. Reinberg, "Method and apparatus on (110) surfaces of silicon
structures with conduction in the <110>direction"

6,586,792    July 1, 2003                                    view abstract in html format
K.Y. Ahn and L. Forbes, "Structures, methods, and systems for ferroelectric memory transistors,"

6,586,797    July 1, 2003                                    view abstract in html format  view full text in  .pdf  format
L. Forbes, J.M. Eldrdge and K.Y. Ahn, "Graded composition gate insulators to reduce tunneling
                 barriers in flash memory devices,"

6,586,835   July 1, 2003      view abstract in html format
K.Y. Ahn, L. Forbes and E.H. Cloud, "Compact system module with built-in thermoelectric
                                                      cooling,"

6,593,201  July 15, 2003       view abstract in html format
L. Forbes, "Monolithic inductance-enhancing integrated circuits, complementary metal oxide
            semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies,
           and inductance-multiplying methods,"

6,597,037     July 22, 2003    view abstract in html format
L. Forbes and W.P. Noble, "Programmable memory address decode array with vertical transistors,"

6,597,203    July 22, 2003     view abstract in html format
L. Forbes, "CMOS gate array with vertical transistors,"

6,600,339    July 29, 2003                                  view abstract in html format
L. Forbes and K.Y. Ahn, "Current mode signal interconnects and CMOS amplifier"

6,605,961   August 12, 2003                              view abstract in html format
L. Forbes, "Low voltage PLA's with ultrathin tunnel oxides"

6,607,956    August 19, 2003    view abstract in html format
K.Y. Ahn and L. Forbes, "Method of manufacturing a single electron resistor memory device"

6,608,378    August 19, 2003    view abstract in html format
K.Y. Ahn and L. Forbes, "Formation of metal oxide gate dielectric,"

6,610,566   August 26, 2003                                  view abstract in html format
L. Forbes and W.P. Noble, "Circuit and method for an open bit line memory cell with a vertical transistor
      and trench plate trench capacitor,"

6,612,019   September 2, 2003                             view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,625,074 September 23, 2003                             view abstract in html format
L. Forbes "Sense amplifier with improved read access"

6,628,158 September 30, 2003                            view abstract in html format
L. Forbes, "Integrated circuit and method for minimizing clock skews"

6,635,948  October 21, 2003                               view abstract in html format
K.Y. Ahn and L. Forbes, "Semiconductor device with electrically coupled spiral inductors"

6,638,807  October 28, 2003                              view abstract in html format
 Forbes ,   et al. , "Technique for gated lateral bipolar transistors"

6,639,268  October 28, 2003                               view abstract in html format
L.Forbes and K.Y. Ahn, "Flash memory with ultra thin vertical body transistors"

6,639,835  October 28, 2003                                 view abstract in html format
L. Forbes, "Static NVRAM with ultra thin tunnel oxides"

6,646,474   November 11, 2003                            view abstract in html format
L. Forbes, "Clocked pass transistor and complementary pass transistor logic circuits"

6,646,534  November 11, 2003                             view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors"

6,649,476   November 18, 2003                               view abstract in html format
L. Forbes, "Monotonic dynamic-static pseudo-NMOS logic circuit and method
of forming a logic gate array"

6,653,196  November 25, 2003                                    view abstract in html format
K.Y. Ahn and L. Forbes, "Open pattern inductor"

6,653,208  November 25, 2003                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Wafer on wafer packaging and method of fabrication for full-wafer
                                                                                   burn-in and testing"

6,654,275   November 25, 2003                                view abstract in html format
L. Forbes, "SRAM cell with horizontal merged devices"

6,656,813  December 2, 2003                                      view abstract in html format
K.Y. Ahn and L. Forbes, "Low loss high Q inductor"

6,661,058  December 9, 2003                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Highly reliable gate oxide and method of fabrication"

6,664,589  December 16, 2003                                    view abstract in html format
L. Forbes and S. Akram, "Technique to control tunneling currents in DRAM capacitors, cells,
                                                                                  and devices"

6,664,806   December 16, 2003                                   view abstract in html format
L. Forbes and K.Y. Ahn, "Memory address and decode circuits with ultra thin body transistors"

6,670,703  December 30, 2003                                view abstract in html format
K.Y. Ahn and L. Forbes, "Buried ground plane for high performance system modules"

6,674,167    January 6, 2004    view abstract in html format
K.Y. Ahn, L. Forbes, and J.M. Eldridge, "Multilevel copper interconnect with double passivation"

6,674,667    January 6, 2004    view abstract in html format
L. Forbes, "Programmable fuse and antifuse and method therefor"

6,674,672    January 6, 2004                             view abstract in html format
L. Forbes and K.Y. Ahn, "Threshold voltage compensation circuits for low voltage
        and low power CMOS integrated circuits"

6,680,518    January 20, 2004                          view abstract in html format
L. Forbes, "Monolithic inductance-enhancing integrated circuits, complementary metal oxide
semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies,
and inductance-multiplying methods,"

6,683,337  January 27, 2004                            view abstract in html format
L. Forbes and K.Y. Ahn, "Dynamic memory based on single electron storage,"

6,686,766  February 3, 2004                             view abstract in html format
L. Forbes and K.Y. Ahn, "Technique to reduce reflections and ringing on CMOS interconnections,"

6,689,660  February 10, 2004                          view abstract in html format
W.P. Noble, L. Forbes and K.Y. Ahn, "4 F2 folded bit line DRAM cell structure having buried bit and word lines,"

6,696,330  February 24, 2004                           view abstract in html format
L. Forbes and W.P. Noble, "Methods, structures, and circuits for transistors with gate-to-body capacitive coupling"

6,696,360  February 24, 2004                          view abstract in html format
K.Y. Ahn and L. Forbes, "Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow"

6,696,912   February 24, 2004     view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductor with a magnetic core"

6,700,821   March 2, 2004                             view abstract in html format
L. Forbes, W.P. Noble and E.H. Cloud, "Programmable mosfet technology and programmable
                         address decode and correction"

6,701,607   March 9, 2004                               view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors"

6,706,597    March 16, 2004                            view abstract in html format
J.E. Geusic and L. Forbes, "Method for textured surfaces in floating gate tunneling oxide devices"

6,709,978      March 23, 2004       view abstract in html format
J.E. Geusic, K.Y. Ahn and L. Forbes, "Method for forming integrated circuits using high aspect ratio
              vias through a semiconductor wafer"

 6,710,428    March 23, 2004      view abstract in html format
K.Y. Ahn and L. Forbes, "Porous silicon oxycarbide integrated circuit insulator"

6,710,538      March 23, 2004       view abstract in html format
K.Y. Ahn and L. Forbes, "Field emission display having reduced power requirements and method"

6,720,216      April 13, 2004           view abstract in html format
L. Forbes, "Method  for forming a programmable decoder with vertical transistors"

6,720,221    April 13, 2004             view abstract in html format
K.Y. Ahn and L. Forbes, "Structure and method for dual gate oxide thicknesses"

6,720,655    April 13, 2004            view abstract in html format
K.Y. Ahn and L. Forbes, "Multilevel interconnect structure with low-k dielectric"

6,723,577   April 20, 2004      view abstract in html format
J.E. Geusic, K.Y. Ahn and L. Forbes, "Method of forming an optical fiber interconnect through a semiconductor wafer"

6,729,928        May 4, 2004            view abstract in html format
L. Forbes and K.Y. Ahn, "Structure and method for improved field emitter arrays,"

6,730,567       May 4, 2004             view abstract in html format
L. Forbes and K.Y. Ahn, "Dynamic memory based on single electron storage,"

6,730,960       May 4, 2004               view abstract in html format
L. Forbes  "Static NVRAM with ultra thin tunnel oxides,"

6,731,531       May 4, 2004              view abstract in html format
L. Forbes and K.Y. Ahn, "Carburized silicon gate insulators for integrated circuits,"

6,734,510  May 11, 2004                  view abstract in html format
L. Forbes, L.C. Tran and K.Y. Ahn, "Technique to mitigate short channel effects with vertical
           gate transistor with different gate materials,"

6,737,740          May 18, 2004                view abstract in html format
L. Forbes and K.Y. Ahn, "High performance silicon contact for flip chip"

6,737,887         May 18, 2004                  view abstract in html format
L. Forbes and K.Y. Ahn, "Current mode signal interconnects and CMOS amplifier"

6,737,926       May 18, 2004                    view abstract in html format
L. Forbes, "Method and apparatus for providing clock signals at different locations with minimal
                                   clock skew"

6,738,240     May 18, 2004                      view abstract in html format
K.Y. Ahn and L. Forbes, "Microtransformer for system-on-chip power supply"

6,741,104      May 25, 2004                     view abstract in html format
L. Forbes and B. Keeth, "DRAM sense amplifier for low voltages,"

6,741,519      May 25, 2004                     view abstract in html format
L. Forbes, E.H. Cloud and W.P. Noble, "DRAM technology compatible processor/memory chips,"

6,744,082    June 1, 2004                        view abstract in html format
L. Forbes and K.Y. Ahn, "Static pass transistor logic with transistors with multiple vertical gates,"

6,744,094    June 1, 2004                        view abstract in html format
L. Forbes, "Floating gate transistor with horizontal gate layers stacked next to vertical body,"

6,746,893   June 8, 2004                          view abstract in html format
L. Forbes and K.Y. Ahn, "Transistor with variable electron affinity gate and methods of fabrication and use,"

6,747,305  June 8, 2004                           view abstract in html format
L. Forbes and W.P. Noble, "Memory address decode array with vertical transistors,"

6,754,108  June 22, 2004                         view abstract in html format
L. Forbes, "DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators,"

6,756,298  June 29, 2004                           view abstract in html format
K.Y. Ahn and L. Forbes, "Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals,"

6,756,673  June 29, 2004                         view abstract in html format
K.Y. Ahn and L. Forbes, "Low-loss coplanar waveguides and method of fabrication ,"

6,756,875  June 29, 2004                           view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductor with a magnetic core,"

6,760,967      July 13, 2004                     view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,762,068    July 13, 2004                         view abstract in html format
L. Forbes and K.Y. Ahn, "Transistor with variable electron affinity gate and methods of fabrication and use,"

6,762,478    July 13, 2004                         view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,762,500     July 13, 2004                        view abstract in html format
K.Y. Ahn and L. Forbes, "Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow,"

6,764,901  July 20, 2004                            view abstract in html format
W.P. Noble and L. Forbes, "Circuit and method for a folded bit line memory cell with vertical transistor
                       and trench capacitor,"

6,767,795      July 27, 2004          view abstract in html format
K.Y. Ahn and L. Forbes, "Highly reliable amorphous high-k gate dielectric ZrOXNY,"

6,772,362    August 3, 2004        view abstract in html format
L. Forbes and K.Y. Ahn, "System for distributing clock signal with a rise rate such that signals appearing at first and second output terminals have substantially no signal skew,"

6,773,968    August 10, 2004        view abstract in html format
L. Forbes and W.P. Noble, "High density planar SRAM cell using bipolar latch-up and gated diode breakdown,"

6,774,050     August 10, 2004           view abstract in html format
K.Y. Ahn and L. Forbes, "Doped aluminum oxide dielectrics,"

6,777,715    August 17, 2004               view abstract in html format
J.E. Geusic, K.Y. Ahn and L. Forbes, "Integrated circuits using optical waveguide interconnects formed
       through a semiconductor wafer and methods for forming same,"

6,777,770    August 17, 2004              view abstract in html format
K.Y. Ahn and L. Forbes, "Films deposited at glancing incidence for multilevel metallization,"

6,778,441    August 17, 2004              view abstract in html format
L. Forbes, J.M. Eldridge, K.Y.Ahn., "Integrated circuit memory device and method"

6,779,250    August 24, 2004              view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,781,876   August 24, 2004                 view abstract in html format
L. Forbes and K.Y. Ahn, "Memory device with gallium nitride or gallium aluminum nitride gate,"

6,787,370   September 7, 2004                 view abstract in html format
L. Forbes and K.Y. Ahn, "Method of forming a weak ferroelectric transistor,"

 6,787,413   September 7, 2004                 view abstract in html format
K.Y. Ahn and L. Forbes, "Capacitor structure forming methods,"

 6,787,883    September 7, 2004                 view abstract in html format
L. Forbes, "Silicon-germanium devices for CMOS formed by ion implantation and solid phase epitaxial regrowth,"

 6,787,888   September 7, 2004                  view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed interconnects,"

 6,790,684    September 14, 2004              view abstract in html format
K.Y. Ahn and L. Forbes, "Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing."

 6,790,791   September 14, 2004               view abstract in html format
K.Y. Ahn and L. Forbes, "Lanthanide doped TiOx dielectric films,"

6,794,246    September 21, 2004                   view abstract in html format
L. Forbes and K.Y. Ahn, "Method for forming programmable logic arrays using vertical gate transistors,"

6,794,255  September 21, 2004                         view abstract in html format
L. Forbes and K.Y. Ahn, "Carburized silicon gate insulators for integrated circuits,"

6,794,709  September 21, 2004                           view abstract in html format
K.Y. Ahn and L. Forbes, "Structure and method for dual gate oxide thicknesses,"

6,794,735  September 21, 2004                           view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed
             interconnects,"

6,798,009  September 28, 2004                          view abstract in html format
L. Forbes and W.P. Noble, "Circuit and method for an open bit line memory cell with a vertical
     transistor and trench plate trench capacitor,"

6,800,927  October 5, 2004                                  view abstract in html format
W.P. Noble and L. Forbes, "Multiple oxide thicknesses for merged memory and logic applications,"

6,801,056 October 5, 2004                                   view abstract in html format
L. Forbes, "Monotonic dynamic-static pseudo-NMOS logic circuit,"

6,803,326     October 12, 2004   view abstract in html format
K.Y. Ahn and L. Forbes, "Porous silicon oxycarbide integrated circuit insulator,"

6,804,136   October 12, 2004     view abstract in html format
L. Forbes, "Write once read only memory employing charge trapping in insulators,"

6,804,142   October 12, 2004     view abstract in html format
L. Forbes, "6F2 3-transistor DRAM gain cell,"

6,806,805  October 19, 2004        view abstract in html format
K.Y. Ahn and L. Forbes, "Low loss high Q inductor,"

6,809,985  October 26, 2004         view abstract in html format
L. Forbes, E.H. Cloud and W.P. Noble, "DRAM technology compatible processor/memory chips,"

6,812,100   November 2, 2004   view abstract in html format
K.Y. Ahn and L. Forbes, "Evaporation of Y-Si-O films for medium-k dielectrics

6,812,109      November 2, 2004   view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated decoupling capacitors

6,812,137      November 2, 2004   view abstract in html format
L. Forbes and K.Y. Ahn, "Method of forming coaxial integrated circuitry interconnect lines

6,812,513    November 2, 2004   view abstract in html format
J.E. Geusic, L. Forbes and K.Y. Ahn, "Method and structure for high capacitance memory cells

6,812,516    November 2, 2004   view abstract in html format
W.P. Noble and L. Forbes, "Field programmable logic arrays with vertical transistors

6,813,180    November 2, 2004    view abstract in html format
L. Forbes, "Four terminal memory cell, a two-transistor SRAM cell, a SRAM array, a computer system,
a process for forming a SRAM cell, a process for turning a SRAM cell off, a process for writing a SRAM
cell and a process for reading data from a SRAM cell,"

6,815,303   November 9, 2004   view abstract in html format
K.Y. Ahn and L. Forbes, "Bipolar transistors with low-resistance emitter contacts,"

6,815,804   November 9, 2004      view abstract in html format
L. Forbes, K.Y. Ahnand S. Akram, "High permeability composite films to reduce noise in high speed
                                interconnects,"

6,817,087   November 16, 2004       view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,818,937   November 16, 2004        view abstract in html format
W.P. Noble, L. Forbes and K.Y. Ahn, "Memory cell having a vertical transistor with buried source/drain
                               and dual gates,"

6,821,802     November 23, 2004 view abstract in html format
K.Y. Ahn and L. Forbes, "Silicon interposer with optical connections,"

6,822,545     November 23, 2004        view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,825,747   November 30, 2004          view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,825,747   November 30, 2004           view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,828,656  December 7, 2004                 view abstract in html format
L. Forbes and K.Y. Ahn, "High performance silicon contact for flip chip and a system using same,"

6,829,421  December 7, 2004                 view abstract in html format
L. Forbes and J.E. Geusic, "Hollow core photonic bandgap optical fiber,"

6,830,963  December 14, 2004                view abstract in html format
L. Forbes,  "Fully depleted silicon-on-insulator CMOS logic,"

6,833,285   December 21, 2004              view abstract in html format
K.Y. Ahn and L. Forbes, "Method of making a chip packaging device having an interposer,"

6,833,308   December 21, 2004               view abstract in html format
K.Y. Ahn and L. Forbes, "Structure and method for dual gate oxide thicknesses,"

6,833,317  December 21, 2004                view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed interconnects,"

6,835,111   December 28, 2004                view abstract in html format
K.Y. Ahn and L. Forbes, "Field emission display having porous silicon dioxide layer,"

6,835,638   December 28, 2004                  view abstract in html format
L. Forbes and K.Y. Ahn, "Silicon carbide gate transistor and fabrication process,"

6,838,723   January 4, 2005                       view abstract in html format
L. Forbes, "Merged MOS-bipolar capacitor memory cell,"

6,838,726   January 4, 2005                         view abstract in html format
L. Forbes and K.Y. Ahn, "Horizontal memory devices with vertical gates,"

6,838,763   January 4, 2005                           view abstract in html format
K.Y. Ahn and L. Forbes, "Wireless communications system employing a chip carrier,"

6,838,911   January 4, 2005                            view abstract in html format
L. Forbes, "Monotonic dynamic static pseudo-NMOS logic circuits,"

6,842,370  January 11, 2005                              view abstract in html format
L. Forbes, "Vertical NROM having a storage density of 1 bit per 1F2,"

6,844,203   January 18, 2005                                 view abstract in html format
K.Y. Ahn and L. Forbes, "Gate oxides, and methods of forming,"

6,844,256   January 18, 2005                                view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed interconnects,"

6,846,738   January 25, 2005                                view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed interconnects,"

6,850,141  February 1, 2005                     view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,852,613   February 8, 2005                                view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin films to reduce noise in high
                               speed interconnections,"

6,853,288   February 8, 2005                                 view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductor with a magnetic core,"

6,853,522   February 8, 2005                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Microtransformer for system-on-chip power supply,"

6,853,587   February 8, 2005                                   view abstract in html format
l. Forbes, "Vertical NROM having a storage density of 1 bit per 1F2,"

6,858,120   February 22, 2005                                view abstract in html format
K.Y. Ahn and L. Forbes, "Method and apparatus for the fabrication of ferroelectric films,"

6,858,444   February 22, 2005                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Method for making a ferroelectric memory transistor,"

6,858,865   February 22, 2005                                  view abstract in html format
K.Y. Ahn and L. Forbes, "Doped aluminum oxide dielectrics,"

6,859,396  February 22, 2005                                  view abstract in html format
L. Forbes, "Programmable fuse and antifuse and method thereof ,"

6,861,727   March 1, 2005                                      view abstract in html format
L. Forbes and J.M. Eldridge, "Antifuse structures, methods, and applications,"

6,864,139  March 8, 2005                                  view abstract in html format
L. Forbes, "Static NVRAM with ultra thin tunnel oxides,"

6,878,991  April 12, 2005                                    view abstract in html format
L. Forbes, "Vertical device 4F2 EEPROM memory ,"

6,879,017  April 12, 2005                                       view abstract in html format
K.Y. Ahn, L. Forbes, and P.A. Farrar, "Methods and structures for metal interconnections
           in integrated circuits ,"

6,881,624  April 19, 2005                                     view abstract in html format
L. Forbes, "P-channel dynamic flash memory cells with ultrathin tunnel oxides,"

6,881,627 April 19, 2005                                      view abstract in html format
L. Forbes and K.Y. Ahn, "Flash memory with ultra thin vertical body transistors,"

6,884,706   April 26, 2005                                   view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin
             films to reduce noise in high speed interconnections,"

6,884,739  April 26, 2005                                     view abstract in html format
K.Y. Ahn and L. Forbes, "Lanthanide doped TiOx dielectric films by plasma oxidation,"

6,887,749    May 3, 2005                                     view abstract in html format
W.P. Noble and L. Forbes, "Multiple oxide thicknesses for merged memory and logic applications,"

6,888,739    May 3, 2005                                      view abstract in html format
L. Forbes, "Nanocrystal write once read only memory for archival storage,"

6,888,740   May 3, 2005                                           view abstract in html format
L. Forbes, "Two-transistor SRAM cells,"

6,888,749   May 3, 2005                                         view abstract in html format
L. Forbes, "P-channel dynamic flash memory cells with ultrathin tunnel oxides,"

6,890,812   May 10, 2005                                     view abstract in html format
L. Forbes and K.Y. Ahn, "Method of forming a memory having a vertical transistor,"

6,890,843   May 10, 2005                                     view abstract in html format
L. Forbes,  K.Y. Ahn and L.C. Tran, "Methods of forming semiconductor structures,"

6,893,933  May 17, 2005               view abstract in html format
K.Y. Ahn and L. Forbes, "Bipolar transistors with low-resistance emitter contacts,"

6,893,984   May 17, 2005                                   view abstract in html format
K.Y. Ahn and L. Forbes, "Evaporated LaA1O3 films for gate dielectrics,"

6,894,532  May 17, 2005                                    view abstract in html format
L. Forbes and K.Y. Ahn, "Programmable logic arrays with ultra thin body transistors,"

6,898,362  May 24, 2005                                    view abstract in html format
L. Forbes and J.E. Geusic, "Three-dimensional photonic crystal waveguide structure and method."

6,900,116    May 31, 2005                                      view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin films to reduce noise in high speed interconnections,"

6,900,122   May 31, 2005                                         view abstract in html format
K.Y. Ahn and L. Forbes, "Low-temperature grown high-quality ultra-thin praseodymium gate dielectrics,"

6,900,521    May 31, 2005                                       view abstract in html format
L. Forbes and K.Y. Ahn, "Vertical transistors and output prediction logic circuits containing same,"

6,900,716    May 31, 2005                                        view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,903,003    June 7, 2005                                            view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability composite films to reduce noise in high speed interconnects,"

6,903,367     June 7, 2005                                             view abstract in html format
L. Forbes," Programmable memory address and decode circuits with vertical body transistors,"

6,903,444 .   June 7, 2005                                              view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin films to reduce noise in high speed interconnections,"

6,906,402     June 14, 2005                                           view abstract in html format
 L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin films to reduce noise in high speed interconnections,"

 6,906,953   June 14, 2005                     view abstract in html format
 L. Forbes, "Vertical NROM having a storage density of 1 bit per 1F2,"

6,909,138   June 21, 2005                                               view abstract in html format
L. Forbes, "P-channel dynamic flash memory cells with ultrathin tunnel oxides,"

6,909,635    June 21, 2005                          view abstract in html format
L. Forbes, W.P. Noble, and E.H. Cloud, "Programmable memory cell using charge trapping
in a gate oxide,"

6,910,260     June 28, 2005                        view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors,"

6,912,158     June 28, 2005                                       view abstract in html format
L. Forbes, "Transistor with nanocrystalline silicon gate structure,"

6,912,778    July 5, 2005                                           view abstract in html format
K.Y. Ahn and L. Forbes, "Methods of fabricating full-wafer silicon probe cards for burn-in and
                            testing of semiconductor devices,"

6,914,278   July 5, 2005                                           view abstract in html format
L. Forbes, K.Y. Ahn and S. Akram, "High permeability thin films and patterned thin films to
                            reduce noise in high speed interconnections,"

6,914,800   July 5, 2005                                           view abstract in html format
K.Y. Ahn and L. Forbes, "Structures, methods, and systems for ferroelectric memory transistors,"

6,919,254  July 19, 2005                                          view abstract in html format
L. Forbes, "Computer systems, processes for forming a SRAM cell, processes for turning a SRAM cell off,
     processes for writing a SRAM cell and processes for reading data from a SRAM cell,"

6,919,266  July 19, 2005                                           view abstract in html format
K.Y. Ahn and L. Forbes, "Copper technology for ULSI metallization,"

6,921,702  July 26, 2005                                          view abstract in html format
K.Y. Ahn and L. Forbes, "Atomic  layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics,"

 6,924,194    August 2, 2005                   view abstract in html format
L. Forbes, E.H. Cloud and W.P. Noble, "DRAM technology compatible processor/memory chips,"

6,927,122    August 9, 2005                                    view abstract in html format
J.E. Geusic, L. Forbes and K.Y. Ahn, "Method and structure for high capacitance memory cells,"

6,927,666   August 9, 2005                        view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductor with a magnetic core,"

6,928, 984  August 16, 2005                      view abstract in html format
L.. Forbes and J.E. Geusic, "Gettering using voids formed by surface transformation,"

6,930,346     August 16, 2005                                   view abstract in html format
K.Y. Ahn and L. Forbes, "Evaporation of Y-Si-O films for medium-K dielectrics,"

6,936,849     August 30, 2005                   view abstract in html format
L. Forbes and K.Y. Ahn, "Silicon carbide gate transistor,"

6,936,886    August 30, 2005                   view abstract in html format
W.P. Noble and L. Forbes, "High density SRAM cell with latched vertical transistors,"

6,940,761   September 6, 2005                view abstract in html format
L. Forbes, "Merged MOS-bipolar capacitor memory cell,"

6,943,083   September 13, 2005               view abstract in html format
L. Forbes, "Merged MOS-bipolar capacitor memory cell,"

 6,946,879  September 20, 2005             view abstract in html format
L. Forbes, "Logic array and dynamic logic method,"

6,948,230  September 27, 2005              view abstract in html format
K.Y. Ahn and L. Forbes, "Integrated circuit inductors

6,950,338  September 27, 2005              view abstract in html format
Forbes; Leonard (Corvallis, OR); Geusic; Joseph E. (Berkeley Heights, NJ); Ahn; Kie Y. (Chappaqua, NY),
"Method for operating a memory device having an amorphous silicon carbide gate insulator,"

6,950,585  September 27, 2005              view abstract in html format
Forbes; Leonard (Corvallis, OR); Geusic; Joseph E. (Berkeley Heights, NJ) ,
"Hollow core photonic bandgap optical fiber,"

6,952,032   October 4, 2005                                  view abstract in html format
Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA); Ahn; Kie Y. (Chappaqua, NY)
"Programmable array logic or memory devices with asymmetrical tunnel barriers,"

6,952,117   October 4, 2005
Forbes; Leonard (Corvallis, OR)                  view abstract in html format
"Distributed clock generator for semiconductor devices and related method of operating semiconductor
devices,"

6,952,362   October 4, 2005
Forbes; Leonard (Corvallis, OR)                   view abstract in html format
"Ferroelectric write once read only memory for archival storage,"

6,952,366   October 4, 2005                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
"NROM flash memory cell with integrated DRAM,"

6,953,375  October 11, 2005                         view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Manufacturing method of a field emission display having porous silicon dioxide insulating layer,"

6,953,730  October 11, 2005                         view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics,"

6,953,996  October 11, 2005                                     view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Low-loss coplanar waveguides and method of fabrication,"

6,955,968  October 18, 2005                                         view abstract in html format
Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA)
"Graded composition gate insulators to reduce tunneling barriers in flash memory devices,"

6,956,256  October 18, 2005                                       view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Vertical gain cell,"

6,956,772   October 18, 2005                             view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Programmable fuse and antifuse and method thereof,"

6,956,908   October 18, 2005                                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Technique to simultaneously distribute clock signals and data on integrated circuits, interposers, and circuit
boards,"

6,958,302   October 25, 2005                             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Atomic layer deposited Zr-Sn-Ti-O films using TiI4,"

6,958,937   October 25, 2005                                         view abstract in html format
Forbes; Leonard (Corvallis, OR)
"DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators,"

6,960,538   November 1, 2005                                        view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Composite dielectric forming methods and composite dielectrics,"

6,960,821  November 1, 2005                                         view abstract in html format
Noble; Wendell P. (Milton, VT); Forbes; Leonard (Corvallis, OR); Reinberg; Alan R. (Westport, CT)
Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

6,962,866  November 8, 2005                                        view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"System-on-a-chip with multi-layered metallized through-hole interconnection,"

6,963,103  November 8, 2005                                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
"SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators,"

6,964,903 November 15, 2005                                    view abstract in html format
Forbes; Leonard (Corvallis, OR); Noble, Jr.; Wendell P. (Milton, VT)
"Method of fabricating a transistor on a substrate to operate as a fully depleted structure,"

6,965,123 November 15, 2005                                          view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Transistor with variable electron affinity gate and methods of fabrication and use,"

6,970,021 November 29, 2005                                           view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Low voltage comparator,"

6,970,053  November 29, 2005                                           view abstract in html format
Akram; Salman (Boise, ID); Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Atomic layer deposition (ALD) high permeability layered magnetic films to reduce noise in high speed
interconnection,"

6,970,370  November 29, 2005                                           view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Ferroelectric write once read only memory for archival storage,"

6,972,599  December 6, 2005                                              view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Pseudo CMOS dynamic logic with delayed clocks"

6,975,531 December 13, 2005                                  view abstract in html format
Forbes; Leonard (Corvallis, OR)
"6F2 3-transistor DRAM gain cell,"

 6,976,300 December 20, 2005                                      view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Integrated circuit inductors,"

6,979,607   December 20, 2005                                    view abstract in html format
 Forbes; Leonard (Corvallis, OR); Akram; Salman (Boise, ID)
"Technique to control tunneling currents in DRAM capacitors, cells, and devices,"

 6,979,855  December 27, 2005                                    view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"High-quality praseodymium gate dielectrics,"

 6,979,857  December 27, 2005                                    view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Apparatus and method for split gate NROM memory,"

 6,980,033  December 27, 2005                                    view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Pseudo CMOS dynamic logic with delayed clocks,"

6,984,886   January 10, 2006                                             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"System-on-a-chip with multi-layered metallized through-hole interconnection,"

6,984,891  January 10, 2006                                                view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Methods for making copper and other metal interconnections in integrated circuits,"

6,987,037  January 17, 2006                                          view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Strained Si/SiGe structures by ion implantation,"

6,989,335  January 24, 2006                                          view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Composite dielectric forming methods and composite dielectrics,"

6,989,573  January 24, 2006                                           view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Lanthanide oxide/zirconium oxide atomic layer deposited nanolaminate gate dielectrics,"

6,990,023  January 24, 2006                                            view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Horizontal memory devices with vertical gates,"

6,991,988   January 31, 2006                                            view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Static pass transistor logic with transistors with multiple vertical gates,"

6,992,871  January 31, 2006                                              view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Microtransformer for system-on-chip power supply,"

6,995,057  February 7, 2006                                                 view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Folded bit line DRAM with vertical ultra thin body transistors,"

6,995,441  February 7, 2006                                                   view abstract in html format
Geusic; Joseph E. (Berkeley Heights, NJ); Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Integrated circuits using optical waveguide interconnects formed through a semiconductor wafer and
methods for forming same,"

6,995,443 February 7, 2006                                                      view abstract in html format
Geusic; Joseph E. (Berkeley Heights, NJ); Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Integrated circuits using optical fiber interconnects formed through a semiconductor wafer,"

6,995,470 February 7, 2006                                                     view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
"Multilevel copper interconnects with low-k dielectrics and air gaps,"

6,996,009 February 7, 2006                                                view abstract in html format
Forbes; Leonard (Corvallis, OR)
"NOR flash memory cell with high storage density,"

6,998,311  February 14, 2006                                           view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Methods of forming output prediction logic circuits with ultra-thin vertical transistors,"

 6,999,351  February 14, 2006                                                view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Computer systems, processes for turning a SRAM cell off, and processes for writing a SRAM cell and processes for reading data from a SRAM cell,"

7,005,344  February 28, 2006                                      view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Method of forming a device with a gallium nitride or gallium aluminum nitride gate,"

7,008,854  March 7, 2006                                          view abstract in html format
Forbes; Leonard (Corvallis, OR)
"Silicon oxycarbide substrates for bonded silicon on insulator,"

7,015,525    March 21, 2006                                            view abstract in html format
Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)
"Folded bit line DRAM with vertical ultra thin body transistors,"

 7,018,467    March 28, 2006                                     view abstract in html format
Geusic; Joseph E. (Berkeley Heights, NJ); Forbes; Leonard (Corvallis, OR)
"Three-dimensional complete bandgap photonic crystal formed by crystal modification,"
 

 7,020,030   March 28, 200                          view abstract in html format
Forbes; Leonard (Corvallis, OR)
 "SRAM cell with horizontal merged devices,"

7,022,553 April 4, 2006                               view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Compact system module with built-in thermoelectric cooling
 

7,023,040  April 4, 2006                                     view abstract in html format
Forbes; Leonard (Corvallis, OR); Cloud; Eugene H. (Boise, ID); Noble; Wendell P. (Milton, VT)
DRAM technology compatible processor/memory chips

7,023,051  April 4, 2006                                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
Localized strained semiconductor on insulator

7,023,316 April 4, 2006                                         view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Semiconductor device with electrically coupled spiral inductors

7,026,694  April 11, 2006                                        view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Lanthanide doped TiOx dielectric films by plasma oxidation

7,027,328  April 11, 2006                                        view abstract in html format
Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA); Ahn; Kie Y. (Chappaqua, NY)
Integrated circuit memory device and method

7,030,436  April 18, 2006                                         view abstract in html format
Forbes; Leonard (Corvallis, OR)
Embedded DRAM gain memory cell having MOS transistor body provided with a bi-polar transistor charge
injecting means

7,030,725  April 18, 2006                                          view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Semiconductor device with electrically coupled spiral inductors

7,037,862     May 2, 2006                                       view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Dielectric layer forming method and devices formed therewith

7,041,341    May 9, 2006                                            view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Process for the fabrication of oxide films

7,041,575   May 9, 2006                                              view abstract in html format
Forbes; Leonard (Corvallis, OR)
Localized strained semiconductor on insulator

7,042,043   May 9, 2006                                               view abstract in html format
Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA); Ahn; Kie Y. (Chappaqua, NY)
Programmable array logic or memory devices with asymmetrical tunnel barriers

7,042,148   May 9, 2006                                                view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Field emission display having reduced power requirements and method

7,045,430   May 16, 2006                                            view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Atomic layer-deposited LaAlO3 films for gate dielectrics

7,045,874  May 16, 2006                                             view abstract in html format
Forbes; Leonard (Corvallis, OR)
Micromechanical strained semiconductor by wafer bonding

7,045,880  May 16, 2006                                            view abstract in html format
Noble; Wendell P. (Milton, VT); Forbes; Leonard (Corvallis, OR); Reinberg; Alan R. (Westport, CT)
Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

7,049,192  May 23, 2006                                             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Lanthanide oxide / hafnium oxide dielectrics

7,050,330 May 23, 2006                                            view abstract in html format
Forbes; Leonard (Corvallis, OR)
Multi-state NROM device

7,054,532  May 30, 2006                                             view abstract in html format
Forbes; Leonard (Corvallis, OR); Geusic; Joseph E. (Berkeley Heights, NJ)
Three-dimensional photonic crystal waveguide structure and method

7,057,223  June 6, 2006                                             view abstract in html format
Noble; Wendell P. (Milton, VT); Forbes; Leonard (Corvallis, OR)
Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor

7,064,058  June 20, 2006                                           view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Low-temperature growth high-quality ultra-thin praseodymium gate dieletrics

7,064,438 June 20, 2006                                            view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Low-loss coplanar waveguides

7,067,421 June 27, 2006                                          view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA)
Multilevel copper interconnect with double passivation

7,068,544 June 27, 2006                                          view abstract in html format
Forbes; Leonard (Corvallis, OR); Eldridge; Jerome M. (Los Gatos, CA)
Flash memory with low tunnel barrier interpoly insulators

7,072,213    July 4, 2006                         view abstract in html format
Forbes; Leonard (Corvallis, OR)
NROM flash memory cell with integrated DRAM

7,074,673    July 11, 2006                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
Service programmable logic arrays with low tunnel barrier interpoly insulators

7,075,146   July 11, 2006                             view abstract in html format
Forbes; Leonard (Corvallis, OR)
4F.sup.2 EEPROM NROM memory arrays with vertical devices

7,075,829   July 11, 2006                           view abstract in html format
Forbes; Leonard (Corvallis, OR)
Programmable memory address and decode circuits with low tunnel barrier
interpoly insulators

7,078,770   July 18, 2006                             view abstract in html format
Forbes; Leonard (Corvallis, OR)
Fully depleted silicon-on-insulator CMOS logic

7,081,421  July 25, 2006                             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Lanthanide oxide dielectric layer

7,084,058   August 1, 2006                             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Method of forming low-loss coplanar waveguides

7,084,078   August 1, 2006                               view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Atomic layer deposited lanthanide doped TiOx dielectric films

7,084,429  August 1, 2006                              view abstract in html format
Forbes; Leonard (Corvallis, OR)
Strained semiconductor by wafer bonding with misorientation

7,084,451  August 1, 2006                                view abstract in html format
Forbes; Leonard (Corvallis, OR), Geusic; Joseph E. (Berkeley Heights, NJ), Ahn; Kie Y. (Chappaqua, NY)
Circuits with a trench capacitor having micro-roughened semiconductor surfaces

7,087,954  August 8, 2006                              view abstract in html format
Forbes; Leonard (Corvallis, OR)
In service programmable logic arrays with low tunnel barrier interpoly insulators

7,091,575 August 15, 2006                               view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Open pattern inductor

7,091,611  August 15, 2006                               view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Multilevel copper interconnects with low-k dielectrics and air gaps

7,095,075  August 22, 2006                               view abstract in html format
Forbes; Leonard (Corvallis, OR)
Apparatus and method for split transistor memory having improved endurance

7,101,770 September 5, 2006                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
Capacitive techniques to reduce noise in high speed interconnections

7,101,778  September 5, 2006                       view abstract in html format
Forbes; Leonard (Corvallis, OR), Cloud; Eugene H. (Boise, ID), Ahn; Kie Y. (Chappaqua, NY)
Transmission lines for CMOS integrated circuits

7,101,813 September 5, 2006                          view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Atomic layer deposited Zr-Sn-Ti-O films

7,102,191 September 5, 2006                      view abstract in html format
Forbes; Leonard (Corvallis, OR)
Memory device with high dielectric constant gate dielectrics and metal floating gates

7,102,450 September 5, 2006                     view abstract in html format
Forbes; Leonard (Corvallis, OR)
Method and apparatus for providing clock signals at different locations with minimal clock skew

7,105,386  September 12, 2006                   view abstract in html format
Noble, Jr.; Wendell P. (Milton, VT), Forbes; Leonard (Corvallis, OR)
High density SRAM cell with latched vertical transistors

7,105,461 September 12, 2006                    view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Composite dielectric forming methods and composite dielectrics

7,109,548 September 19, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), Geusic; Joseph E. (Berkeley Heights, NJ)
Operating a memory device

7,109,563  September 19, 2006                view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Films deposited at glancing incidence for multilevel metallization

7,110,299 September 19, 2006               view abstract in html format
Forbes; Leonard (Corvallis, OR)
Transistor with nanocrystalline silicon gate structure

7,112,494  September 26, 2006                 view abstract in html format
Forbes; Leonard (Corvallis, OR)
Write once read only memory employing charge trapping in insulators

7,112,543  September 26, 2006                view abstract in html format
Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR)
Methods of forming assemblies comprising silicon-doped aluminum oxide

7,112,841 September 26, 2006                   view abstract in html format
Eldridge; Jerome M. (Los Gatos, CA), Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR)
Graded composition metal oxide tunnel barrier interpoly insulators

7,113,429 September 26, 2006                 view abstract in html format
Forbes; Leonard (Corvallis, OR)
Nor flash memory cell with high storage density

7,115,480 October 3, 2006                        view abstract in html format
Forbes; Leonard (Corvallis, OR)
Micromechanical strained semiconductor by wafer bonding

7,115,493 October 3, 2006                        view abstract in html format
Forbes; Leonard (Corvallis, OR), Eldridge; Jerome M. (Los Gatos, CA)
Antifuse structures, methods, and applications

7,115,939 October 3, 2006                     view abstract in html format
Forbes; Leonard (Corvallis, OR),
Floating gate transistor with horizontal gate layers stacked next to vertical body

7,120,046   October 10, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), "Memory array with surrounding gate access transistors and capacitors with global
                                     and staggered local bit lines

7,126,183    October 24, 2006                 view abstract in html format
Forbes; Leonard (Corvallis, OR), Eldridge; Jerome M. (Los Gatos, CA), Ahn; Kie Y. (Chappaqua, NY), "Programmable array
                         logic or memory with p-channel devices and asymmetrical tunnel barriers

7,126,380   October 24, 2006                 view abstract in html format
Forbes; Leonard (Corvallis, OR),"Distributed clock generator for semiconductor devices and related methods
                                      of operating semiconductor devices

7,129,553    October 31, 2006                 view abstract in html format
Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR), "Lanthanide oxide/hafnium oxide dielectrics

7,130,220    October 31, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), "Write once read only memory employing floating gates

7,132,711  November 7, 2006                 view abstract in html format
Forbes; Leonard (Corvallis, OR), Eldridge; Jerome M. (Los Gatos, CA), Ahn; Kie Y. (Chappaqua, NY),
"Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers,"

7,133,315   November 7, 2006               view abstract in html format
Forbes; Leonard (Corvallis, OR), "Write once read only memory employing charge trapping in insulators,"

7,135,369  November 14, 2006             view abstract in html format
Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR), "Atomic layer deposited ZrAl.sub.xO.sub.y
dielectric layers including Zr.sub.4AlO.sub.9,"

7,135,421  November 14, 2006                 view abstract in html format
Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR), "Atomic layer-deposited hafnium aluminum oxide,"

7,135,734  November 14, 2006                 view abstract in html format
Eldridge; Jerome M. (Los Gatos, CA), Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR),
"Graded composition metal oxide tunnel barrier interpoly insulators,"

7,136,302  November 14, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), Eldridge; Jerome M. (Los Gatos, CA), Ahn; Kie Y. (Chappaqua, NY) ,
"Integrated circuit memory device and method ,"

7,138,681 November 21, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), Ahn; Kie Y. (Chappaqua, NY),
"High density stepped, non-planar nitride read only memory,"

7,138,718  November 21, 2006                 view abstract in html format
Ahn; Kie Y. (Chappaqua, NY), Forbes; Leonard (Corvallis, OR), "Multilevel interconnect structure with low-k dielectric,"

7,141,824 November 28, 2006                   view abstract in html format
Forbes; Leonard (Corvallis, OR), Ahn; Kie Y. (Chappaqua, NY) , "Transistor with variable electron affinity gate,"

7,148,538  December 12, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), "Vertical NAND flash memory array,"

7,149,109  December 12, 2006                  view abstract in html format
Forbes; Leonard (Corvallis, OR), "Single transistor vertical memory gain cell,"

7,151,024  December 19, 2006                   view abstract in html format
Forbes; Leonard (Corvallis, OR), "Long retention time single transistor vertical memory gain cell,"

7,151,030  December 19, 2006                     view abstract in html format
Forbes; Leonard (Corvallis, OR), Ahn; Kie Y. (Chappaqua, NY) , "Horizontal memory devices with vertical gates,"

7,151,294  December 19, 2006                     view abstract in html format
Forbes; Leonard (Corvallis, OR), Ahn; Kie Y. (Chappaqua, NY) , "High density stepped, non-planar flash memory,"

7,151,690  December 19, 2006                   view abstract in html format
Forbes; Leonard (Corvallis, OR), "6F.sup.2 3-Transistor DRAM gain cell,"

WO2007005323    2007-01-11
L. Forbes, P.A. Farrar and A.R. Reiberg, "GOLD–SEMICONDUCTOR PHASE CHANGE MEMORY FOR ARCHIVAL                       DATA STORAGE"
  view abstract in pdf  format

 WO2006026716    2006-03-09
  K.Y. Ahn and L. Forbes, "ATOMIC LAYER DEPOSITED TITANIUM ALUMINUM
                     OXIDE FILMS,"
 view abstract in pdf  format
 

WO2005119783 - 2005-12-15
 L. Forbes, "BALLISTIC INJECTION NROM FLASH MEMORY,"
 view abstract in pdf  format

WO2005112119  2005-11-24
L. Forbes, " NROM  DEVICE,"
view abstract in pdf  format

WO2005083782    2005-09-09
L. Forbes, "VERTICAL EEPROM NROM MEMORY DEVICES,"
view abstract in pdf  format

WO2005060003   2005-06-30
L. Forbes, "VERTICAL NROM NAND FLASH MEMORY ARRAY,"
view abstract in pdf  format

WO2005053020    2005-06-09
L. Forbes, "APPARATUS AND METHOD FOR VERTICAL SPLIT-GATE NROM
                          MEMORY"
view abstract in pdf  format

 WO2005050740   2005-06-02
L. Forbes, "NROM FLASH MEMORY DEVICES ON ULTRATHIN SILICON"
view abstract in pdf  format

WO2005048268   2005-05-26
L. Forbes, "NROM FLASH MEMORY WITH SELF-ALIGNED STRUCTURAL CHARGE SEPARATION,"
 view abstract in pdf  format

WO2005038932    2005-04-28
L. Forbes, "FULLY DEPLETED SILICON-ON-INSULATOR CMOS LOGIC,"
view abstract in pdf  format

WO2005006440 - 2005-01-20
L. Forbes, "APPARATUS AND METHOD FOR SPLIT TRANSISTOR MEMORY HAVING IMPROVED ENDURANCE"

WO2004079796  2004-09-16
K.Y. Ahn and L. Forbes, "ATOMIC LAYER DEPOSITED DIELECTRIC LAYERS"

WO2004019394   2004-03-04
L. Forbes and K.Y. Ahn, "ATOMIC LAYER DEPOSITION OF CMOS GATES"

WO2004017362    2004-02-26
L. Forbes,"NANOCRYSTAL WRITE-ONCE READ-ONLY MEMORY"

WO2004001856 - 2003-12-31
    L. Forbes, "  VERTICAL NROM  "

WO2004001802 - 2003-12-31
K. Prall and L.Forbes, " NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES
          AND METHODS"

WO03105205 - 2003-12-18
K.Y. Ahn and L. Forbes, "HAFNIUM-ALUMINUM OXIDE DIELECTRIC FILMS"
 view abstract in pdf  format

WO03083947A2    15 Aug.  2002
K.Y.  Ahn and L. Forbes, “FOLDED BIT LINE DRAM WITH ULTRA THIN BODY TRANSISTORS,”
 view abstract in pdf  format

WO03063250  15 Aug. 2002
L. Forbes, "PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH
                    ULTRA THIN VERTICAL BODY TRANSISTORS,"
 view abstract in pdf  format

WO03062908  31 July 2003
L. Forbes and J.E. Geusic, "THREE-DIMENSIONAL PHOTONIC CRYSTAL WAVEGUIDE STRUCTURE,"
view abstract in pdf  format

WO03015171A1  L. Forbes and K.Y. Ahn     6    Feb. 2003
                      OPEN BIT LINE DRAM WITH VERTICAL ULTRA-THIN BODY TRANSISTORS
view abstract in pdf  format

WO02080227   K.Y. Ahn and L. Forbes   October 10, 2002
                      MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN
                      BODY TRANSISTORS
  view abstract in pdf  format

WO02078187  L. Forbes                         October 3, 2002
                      PROGRAMMABLE LOGIC ARRAYS WITH ULTRA THIN BODY
                      TRANSISTORS
 view abstract in pdf  format

WO02078186  L. Forbes                         October 3, 2002
                      IN SERVICE PROGRAMMABLE LOGIC ARRAYS WITH ULTRA
                      THIN VERTICAL BODY TRANSISTORS
 view abstract in pdf  format

WO02071611    15 Aug. 2002  L. Forbes
                 "MONOTONIC DYNAMIC-STATIC PSEUDO-NMOS LOGIC CIRCUIT AND
                    METHOD OF FORMING A LOGIC GATE ARRAY"
view abstract in pdf  format

WO02065537  15 Aug. 2002 K.Y. Ahn and L. Forbes
                "FORMATION OF METAL OXIDE GATE DIELECTRIC"
view abstract in pdf  format

WO02065522     23 July 2002    K.Y. Ahn and L. Forbes
                "FLASH MEMORY WITH ULTRA THIN VERTICAL BODY TRANSISTORS"
view abstract in pdf  format

WO02065507    15  Aug. 2002   K.Y. Ahn and L. Forbes
                 "DYNAMIC MEMORY BASED ON SINGLE ELECTRON STORAGE"
view abstract in pdf  format

WO02065476    15 Aug. 2002    L. Forbes
                  "PROGRAMMABLE FUSE AND ANTIFUSE AND METHOD THEREFOR"
view abstract in pdf  format

WO02063686   8  Aug. 2002 K.Y. Ahn and L. Forbes
                HIGH PERFORMANCE SILICON CONTACT FOR FLIP CHIP
view abstract in pdf  format

WO 0150507  12 July 2001  K.Y. Ahn, L.C. Tran and L. Forbes
      "METHODS OF FORMING SEMICONDUCTOR STRUCTURES"
 view abstract in pdf  format

WO 0118814A1   15 March 2001        L.  Forbes
      "PSEUDO-DIFFERENTIAL CURRENT SENSE AMPLIFIER WITH HYSTERESIS"
     view abstract in pdf  format

WO 00035083A1    06/15/2000     L. Forbes
    LOW POWER SUPPLY CMOS DIFFERENTIAL AMPLIFIER   TOPOLOGY
    view abstract in gif  format
WO 09919910A1 04/22/1999
    POROUS SILICON OXYCARBIDE INTEGRATED CIRCUIT  INSULATOR
    view abstract in pdf format
WO 09833186A1     07/30/1998    L. Forbes
       DIFFERENTIAL FLASH MEMORY CELL AND METHOD
    view abstract in gif  format